1. Field of the Invention
This invention relates to graphics processing systems. More particularly, this invention relates to the processing circuitry provided within a graphics processing pipeline.
2. Description of the Prior Art
It is known to provide graphics processing systems, such as graphics processing units (CPUs), which include a graphics processing pipeline having multiple processing stages for performing functions such as fetching input data, processing the input data and writing output data back to a frame buffer memory. The graphics processing pipeline may be typically provided with some pipeline memory (e.g. a tile memory) for use in supporting such manipulations within the graphics processing pipeline prior to the writing back of pixel values to a frame buffer memory in which the complete frame of pixel values is assembled.
It is also known within the field of such graphics processing systems to perform resolving operations in which the resolution of input pixel values differs from the resolution of output pixel values. An example of such a resolving operation is down-sampling in which an image is generated at a higher resolution than the resolution at which it will be displayed and accordingly is down sampled to the display resolution. Typically such operations require the graphics processing pipeline to first generate the frame of pixel values at the higher resolution and store these within the frame buffer memory. These high resolution pixel values are then read back from the frame buffer memory and subject to a down-sampling operation before the lower resolution pixel values are written into the frame buffer memory prior to display. The writing of the pixel values at high resolution out to the frame buffer memory followed by the reading of these pixel values back into the graphics processing pipeline so they may be down sampled and written out at the lower resolution is wasteful in terms of memory band width and energy consumption.
Some graphics processing pipelines are known which provide fixed functionality down samplers within the graphics processing pipeline. An example of such a graphics processor is the Mali graphics processing unit designed by ARM Limited of Cambridge, England.
With the advent of more sophisticated graphics processing requirements accompanied by a requirement to reduce power consumption and increase operating speed, it is difficult to tolerate the requirement to write data to the frame buffer memory at a first resolution and then read this data back from the frame buffer memory for conversion to a second resolution when using a programmable resolving operation needed to support sophisticated graphics processing whilst also avoiding memory bandwidth and energy consumption constraints.